Imagers, such as, for example, charge coupled devices (CCD), complementary metal oxide semiconductor (CMOS) and others, are widely used in imaging applications including digital still and video cameras. A CMOS imager circuit includes a focal plane array of pixels, each one of the pixels including a photosensor, for example, a photogate, photoconductor or a photodiode for accumulating photo-generated charge in the specified portion of the substrate. Each pixel has a charge storage region, formed on or in the substrate, which is connected to the gate of an output transistor that is part of a readout circuit. The charge storage region may be constructed as a floating diffusion region. In some imager circuits, each pixel may include at least one electronic device such as a transistor for transferring charge from the photosensor to the storage region and one device, also typically a transistor, for resetting the storage region to a predetermined charge level.
FIG. 1 shows one conventional CMOS pixel 10 having a four-transistor (4T) design, including pinned photodiode photosensor 20, floating diffusion region 30, reset transistor 40, transfer transistor 50, source follower transistor 60, and row select transistor 70. Transfer transistor 50 is controlled by signal TX, reset transistor 40 is controlled by signal RST and row select transistor 70 is controlled by signal SEL. In a CMOS imager circuit, the active elements of pixel 10 perform the functions of: (1) photon to charge conversion; (2) accumulation of image charge; (3) resetting the floating diffusion region 30 to a known state (e.g., Vaa-pix); (4) transfer of charge to the floating diffusion region 30; (5) selection of the pixel 10 for readout; and (6) output and amplification of signals representing pixel reset level and pixel charge. Photo charge may be amplified when it moves from the initial charge accumulation region in the photosensor 20 to the floating diffusion region 30. The charge at the floating diffusion region 30 is typically converted to a pixel output voltage by the source follower transistor 60 and output onto a column output line 72 (via row select transistor 70).
FIG. 2 illustrates a block diagram of a CMOS imager circuit 208 having a pixel array 200 where each pixel in the array 200 may be constructed as described above. Pixel array 200 comprises a plurality of pixels 10 arranged in a number of columns and rows. The pixels 10 of each row in array 200 are all turned on at the same time by a row select line, and the pixels 10 of each column are selectively output onto column output lines by respective column select lines. A plurality of row and column select lines are provided for the entire array 200. The row lines are selectively activated in sequence by the row driver 210 in response to row address decoder 220 and the column select lines are selectively activated in sequence for each row activated by the column driver 260 in response to column address decoder 270. Thus, a row and column address is provided for each pixel 10. The imager circuit 208 is operated by the control circuit 250, which controls address decoders 220, 270 for selecting the appropriate row and column select lines for pixel readout, and row and column driver circuitry 210, 260, which apply driving voltage to the drive transistors of the selected row and column select lines. Alternatively, multiple columns may be activated at the same time if readout circuits are provided for each column.
The pixel output signals typically include a pixel reset signal, Vrst, taken off the floating diffusion region 30 when it is reset by reset transistor 40 and a pixel image signal, Vsig, which is taken off the floating diffusion region 30 after charges generated by photosensor 20 are transferred to it (thru transfer transistor 50). The Vrst and Vsig signals are sampled by the sample and hold circuit 265 and then subtracted by a differential amplifier 267 that produces a signal Vrst−Vsig for each pixel, which represents the amount of light impinging on the pixels 10. This difference signal is digitized by an analog-to-digital converter (ADC) 275. The digitized pixel signals are fed to an image processor 280, which performs various processing on the digital signals to form a digital image. The digitizing and image processing can be performed on or off the chip containing the pixel array 200.
In order for the imager circuit 208 to successfully capture color differential in a color image, the pixels 10 must be able to detect separate color components of a captured image. Separate color detection is often accomplished by placing a color filter array (CFA) above the pixel array 200 so that each pixel receives only the light of the color of its associated filter according to a specific pattern.
A Bayer color filter array 80, illustrated in FIG. 3, is an exemplary color filter array which can be used. It has an arrangement of color filters to allow the passage of red, green or blue light to respective pixels 10 beneath a filter. Pixels 10 in an array 200 associated with a Bayer color filter array 80 are therefore typically designated as red (R), green (G), or blue (B) pixels according to each pixels' associated filter. That is, a red pixel is a pixel covered by a red filter, a blue pixel is a pixel covered by a blue filter and a green pixel is a pixel covered by a green filter. The Bayer color filter array 80 color ratio is designed to mimic the human eye's propensity to detect more green light than red or blue light, and accordingly comprises a distribution of 50% green pixels, 25% red pixels and 25% blue pixels. Pixels 10 under a Bayer filter 80 are arranged in a pattern of alternating rows 90, 95, 90, 95 having R,G,R,G,R,G pixels and B,G,B,G,B,G pixels, as shown in FIG. 3.
The main objective of a color filter array is to limit the spectral range of light detection of each pixel 10 to a single color in the form of a wavelength range designated by the pixel's associated filter. However, light sometimes passes through an individual color filter at such an angle that it strikes a neighboring pixel and affects the neighboring pixel's detection response. This undesirable occurrence, often referred to as “cross-talk,” is illustrated in FIG. 4. A row 90 of color filters is aligned over a row 100 of pixels. A portion of the light 110 passing through a red filter 115 at an oblique angle reaches a pixel 10G that is designated by the CFA 80 to detect green light (i.e., a green pixel).
When cross-talk such as this occurs throughout a Bayer-filter patterned pixel array, green pixels neighboring red pixels are impinged by an unwanted amount of red-filtered light, while green pixels neighboring blue pixels are impinged by unwanted blue-filtered light. Due to the difference between the effects of the red and blue cross-talk, two distinctly different detection levels or “channels” of green exist where there should be uniformity. This difference, called “green-green imbalance,” can manifest as unwanted artifacts in a digitally captured photo, such as the appearance of a faint checkerboard pattern overlaying the image. Green-green imbalance can be particularly damaging when employing edge-sensitive demosaicing algorithms wherein the imbalance causes false edge defection, resulting in the appearance of distinct “labyrinth lines” of random short orthogonal edges. As pixel sizes grow smaller, the effects of cross-talk and green-green imbalance worsen. There is a need to reduce the effects of green-green imbalance.